The mobile wireless communications market has been growing very rapidly in recent years. The rapid growth has been aided by low-power, low-cost, and high-performance radio frequency (RF) integrated circuits (ICs). Increasing the level of integration has been the major target in the design of transceivers for wireless applications. Highly integrated RFIC reduces the printed circuit board (PCB) area and complexity while lowering the component cost.
In recent years, wireless direct-conversion radio receiver architectures have gained increasing attention, because in these topologies a very high level of integration can be obtained. In a direct-conversion receiver, also known as homodyne, or zero-IF receiver, radio frequency (RF) signals are converted directly into baseband signals, whereby separate intermediate frequency stages are not required. Thus, the number of high-frequency components needed in direct-conversion receivers is lower than in conventional receivers (e.g. super-heterodyne) which include intermediate frequency stages. Due to lower complexity, the integration degree of direct-conversion receivers can be increased in comparison with receivers including intermediate-frequency stages. Moreover, radio transceivers and complete systems-on-a-chip (SOC) realized in pure CMOS (Complementary Metal Oxide Semiconductor) technology are rapidly appearing in a wireless market that for years was dominated by bipolar and BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) implementations.
A schematic block diagram of a direct conversion receiver is shown in FIG. 1. An antenna 2 feeds a received RF signal to a bandpass filter (duplexer) 3 that performs a preselection of a received RF band. A low-noise amplifier (LNA) 5, which is usually the first integrated block of a receiver RFIC 1, amplifies the RF signal in order to reduce the noise contributions of the following stages. Quadrature down conversion mixers 6 and 16 are provided to mix a received signal against an in-phase (I) local oscillator signal and a quadrature (Q) local oscillator signal (via a 90-degree phase shifter 11) from a local oscillator 10 tuned to the center frequency of the desired radio channel. The down-converting mixer 6 outputs the baseband I signal and high-frequency mixing products. Similarly, the down-converting mixer 16 outputs the baseband Q signal and high-frequency mixing products. Low-pass filtering 7 and 17 following down-converter mixers 6 and 16, respectively, removes the high-frequency mix product and any interference signals near the received channel. The filtered baseband I and Q signals are then independently amplified by variable gain amplifiers (VGAs) 8 and 18, respectively, and converted into a digital representation with analog-to-digital (A/D) converters 9 and 19, respectively.
One of the most difficult problems in direct-conversion receiver architecture is the envelope distortion due to even-order nonlinearity. In a direct-conversion receiver, the second-order intermodulation introduces undesirable spectral components at the baseband, which degrade the receiver sensitivity. For instance, if two strong interferers at frequencies f1 and f2 close to the channel of interest experience even-order distortion, they generate a low-frequency interference signal at the frequency f1-f2. Accordingly, many cellular systems require very high IIP2 performance if a direct conversion is to be used.
In a well-designed receiver, the most dominant source of IM2 distortion is the down conversion mixer. Usually the down conversion mixers are based on double-balanced topologies, which generate a small amount of even-order distortion. Moreover, in an ideal mixer, the low-frequency beat present or generated at the mixer RF input is upconverted. Unfortunately, in reality, mixers present a finite feedthrough from the RF input to the intermediate-frequency (IF) output, which results in a finite IIP2 . Most of the double-balanced mixers utilized in wireless receivers are realized as active mixers. In an active quadrature down conversion mixer, the RF input transconductance stage may be used to convert the differential voltage-mode RF signal to a differential RF current. In general, both the RF input transconductor and switching devices in a mixer contribute to the mixer nonlinearity, and the mixer IIP2 is determined by the mixer second-order nonlinearity, mismatches, and offsets. In a perfectly balanced mixer, stimulated and sensed differentially, the IM2 components at the mixer output are presented as common-mode signals with equal amplitude and are therefore cancelled. Unfortunately, in the presence of offsets and mismatches, the cancellation is not perfect, which results in a finite mixer IIP2 . In conclusion, in order to maximize the mixer IIP2 , it is essential to develop techniques for minimizing the IM2 products generated in the mixer, since the device matching and offsets cannot be improved beyond certain limits. In practice, the level of the common-mode IM2 components in the output current of the RF transconductor should be minimized or eliminated. Simultaneously, the matching requirement for the mixer output resistances can be lowered and the need for mixer IIP2 calibration or trimming can be reduced or even avoided. See documents [8] and [9], for example. Document [10] and U.S. Pat. No. 6,992,519 disclose a biasing circuit technique for canceling IM2 distortion in balanced common-source and common-emitter transconductors.
In direct-conversion receivers for full-duplex radio systems, an interstage RF filter 4 between the LNA 5 and mixer stage 6, 16 is often employed to attenuate out-of-band blockers and to suppress the signal leaking from the transmitter. The interstage RF filter 4, often realized in surface acoustic (SAW) technology, relaxes the linearity requirements set on the down-conversion mixer. Examples of direct-conversion receivers with an interstage RF filter are disclosed in documents [1] to [7]. As the down conversion mixers 6, 16 are preceded by an off-chip RF filter 4, the RF input impedance of the mixers has to be designed to match the characteristic impedance, for example, 50Ω, of the filter. If the terminating impedances of the RF filter 4 differ from the specified characteristic impedance, this may result in a large ripple in the passband and a poorer transition band of the filter. A simple and robust way of realizing the input impedance matching in a down-conversion mixer by employing a common-gate (or base) stage for the RF input transconductor in the mixer is disclosed in document [7] and shown in FIG. 2. The transconductance stage 20 may be formed by transistors M1 and M2 in a common-gate configuration so that a diffential RF input voltage is applied to the source electrodes of M1 and M2. The current-mode RF signal from the drains of M1 and M2 is then fed through the current-steering switching transistors M3 to M10 driven by the I and Q phases of the local oscillator (LO) signal. The downconverted output signal is also produced in a current-mode and converted to the voltage at the load resistors RL. Inductors L1 and L2 are biasing inductors. The prior art circuit is further provided with a matching network formed of external matching inductors and capacitors (not shown in FIG. 2) in the RF input of the transconductance stage 20 so as to provide a differential 100-ohm matching to the external SAW filter. Moreover, to further improve IIP2 , a calibration circuit is implemented. The DC offset which can degrade system performance in a zero-IF receiver circuit is controlled by a current-steering DAC at the mixer.